1. Field of the Invention
The present invention concerns a logic device which generates the chip select signals which are needed to enable various chips on a piece of computer hardware.
2. Description of the Related Art
Conventional computer architecture defines an address bus and a data bus to which a variety of devices are connected. Those devices include, typically, a microprocessor, a random access memory, and plural status and control registers. Each of those other devices is addressable from the microprocessor when the microprocessor puts the device's address on the address bus. Chip select logic reads address information on the address bus and generates a chip select signal so as to enable the addressed device.
With increasing complexity of computer devices, however, the number of devices connected to the address and data buses has increased dramatically. This has brought about a corresponding need to be able to generate a chip select signal for each of those devices so that the microprocessor can access and address each of those devices.